Congratulations to Fred Buhler on his Graduation in May of 2019!
Tuesday, May 7, Fred Buhler presented his Ph.D. defense "Energy Efficient Mixed Signal Circuit Techniques for Machine Learning and Security Applications."
The recent aggressive scaling of CMOS technology for increased performance has enabled hardware implementations of meaningful machine-learning and neural-network systems. Most machine-learning hardware implementations from the past decade are digital. However, many machine learning systems require only low accuracy and therefore do not need the inherent accuracy of digital processing. Instead analog or mixed-signal circuitry may enable far more efficient neural network implementations. An additional challenge is that while the increased capability of CMOS circuits has enabled single-chip systems, the responsibility for both critical decision making and processing sensitive information is now concentrated in a single device, resulting in a potential for dangerous security exploits. Our work tackles the energy efficiency and security of IoT and edge devices with new mixed-signal techniques for machine leering and security. First, we address the inefficiency of low-resolution machine learning processing by creating a hybrid analog-digital computational node that is compatible with an all-digital CAD flow. Second, we address IoT edge computing with an analog machine-learning interface that performs linear analog computation during the analog-to-digital digitization process. Third, we present a mixed-signal true random number generator that uses both digital and analog noise-shaping to generate a truly random bitstream. Fourth, addressing the security of the sensor interface, we introduce the first side-channel attack immune digitizer with embedded information barriers that prevent sensitive information from being generated.
Tuesday, May 7, Fred Buhler presented his Ph.D. defense "Energy Efficient Mixed Signal Circuit Techniques for Machine Learning and Security Applications."
The recent aggressive scaling of CMOS technology for increased performance has enabled hardware implementations of meaningful machine-learning and neural-network systems. Most machine-learning hardware implementations from the past decade are digital. However, many machine learning systems require only low accuracy and therefore do not need the inherent accuracy of digital processing. Instead analog or mixed-signal circuitry may enable far more efficient neural network implementations. An additional challenge is that while the increased capability of CMOS circuits has enabled single-chip systems, the responsibility for both critical decision making and processing sensitive information is now concentrated in a single device, resulting in a potential for dangerous security exploits. Our work tackles the energy efficiency and security of IoT and edge devices with new mixed-signal techniques for machine leering and security. First, we address the inefficiency of low-resolution machine learning processing by creating a hybrid analog-digital computational node that is compatible with an all-digital CAD flow. Second, we address IoT edge computing with an analog machine-learning interface that performs linear analog computation during the analog-to-digital digitization process. Third, we present a mixed-signal true random number generator that uses both digital and analog noise-shaping to generate a truly random bitstream. Fourth, addressing the security of the sensor interface, we introduce the first side-channel attack immune digitizer with embedded information barriers that prevent sensitive information from being generated.